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Currency Recognition ASSP Processor



  • Part No. AVDD/VDD A/D
    (Bit)
    Input
    CH.
    MSPS Clamp
    Bias
    PGA Prog.
    Offset
    Full Scale Other
    Features
    Power Consumption Package
    HT82V48 3.0V~3.6V 16×2 3×2 60×2 0.4V~3.0V
    (4-bit)
    0.65~6.0V/V
    (9-bit)
    ±290mV
    (8-bit)
    1.2V/2V --

    925mW/400μA

    48LQFP-EP

     



  • Part No. AVDD/VDD CIS Moudule Shading Correction Line
    Information
    Others Output Power
    Consumption
    Package
    Channel MSPS Element LED Gain Offset
    HT82V70 3.0V~3.6V 3~6 ×2 120×2 1,584 6 ×2 0x ~ 8x
    (10-bit)
    0 ~ -255
    (8-bit)
    Index, Left/Right Boundary,
    Max, Min, Sum, Histogram
    COMP, TG,
    I2C, SPI
    VPFE, EMIFA 400mW/3mW 100LQFP