|
Functional Description
Question 1
What does PFM mean in the PFM Step-up DC/DC Converter of the Ht4xR0xM?
Answer
PFM is an abbreviation for pulse frequency modulation.
Question 2
Does the PFM Step-up DC/DC Converter in the Ht4xR0xM have a chip enable function?
Answer
If the CE pin is enabled, the HT4xR0xM enters the normal operating mode. If the CE pin is disabled, the HT4xR0xM will be shutdown, meaning its internal Reference Block, Gain Block, Feedback and Control Block will all be disabled so as to reduce the power consumption of the HT4xR0xM.
Question 3
What is the Vout Tolerance of the PFM Step-up DC/DC Converter in the HT4xR0xM?
Answer
The PFM Step-up DC/DC Converter in the HT4xR0xM has a tolerance of ±2.5%.
Question 4
What is the output voltage of the PFM Step-up DC/DC Converter in the HT4xR0xM?
Answer
The output voltage of the PFM Step-up DC/DC Converter in the HT4xR0xM is 3.0V.
Question 5
What are the input voltage limits for the PFM Step-up DC/DC Converter in the HT4xR0xM?
Answer
The input voltage range of the HT4xR0xM must be within 0.6V~6.0V.
Question 6
What is the highest efficiency of the PFM Step-up DC/DC Converter in the HT4xR0xM?
Answer
The typical Efficiency of the HT4xR0xM can be up to 85%.
Question 7
What special points should be noted when using the PFM Step-up DC/DC Converter circuit in the HT4xR0xM?
Answer
The HT4xR0xM uses PFM (Pulse Frequency Modulation) to implement the DC/DC conversion. For a more stable and reduced ripple output voltage, an inductor of about 100uH value should be placed in series with its input.
Question 8
What special points should be considered when setting the pull-high resistors of the I/O ports in the HT4xR0xM?
Answer
All the PA0~PA6 pins of the HT4xR0xM series devices can be used as I/O pins, while PA7 can only be used as an input pin. With the exception of PA7, all can select internal pull-high resistors. The difference from other Holtek devices is that their pull-high resistors are not setup using Configuration Options but rather through the PAPU register. PA7 pin can only have a pull-high resistor by implementing it externally.
Question 9
What special points should be noted when setting the clock source of the A/D converter in the HT4xR0xM?
Answer
The clock source of the A/D converter, which originates from the system clock, is first divided by a division ratio, the value of which is determined by the ADSC2~ ADSC0 bits in the ACSR register. However, the minimum value of a permissible A/D clock period is 1us. When the system frequency exceeds 1MHz, inappropriate setting of the ADCS2~ADCS0 bits will result in inaccurate A/D converter values if the A/D conversion time is less than 1us. Therefore if the system frequency is higher than 1MHz, the A/D conversion clock cannot be randomly selected but must be chosen to have a period larger than 1us.
Question 10
Is it necessary to add external protection components to the I/O port when using them as long communication lines?
Answer
The I/O ports use Schmitt Trigger Input structures with internal protection diodes both to VDD and VSS that offer superior noise immunity performance. It is recommended to add a resistor to the I/O pin to minimize interference due to static etc.
Question 11
What status are the I/O and OSC pins in when the LVR function is activated in the HT4xRxM series devices?
Answer
When the voltage is lower than the low voltage reset, the LVR will be activated. If the minimum operating voltage < VDD < low voltage reset, the I/O pins will be initialized to an input condition and the OSC will not stop. The actual LVR voltage will differ according to the manufacturing process. For details refer to the D.C. parameter table in the relevant datasheet.
Question 12
Is there any limitation for the VDD rise time when the HT4xR0xM devices are powered on?
Answer
When an MCU is powered on, a VDD rise time of greater than 0.035V/ms, should be ensured in order to implement a successful Reset function. For most battery-powered products, when the battery is running low, its increasing internal resistance will cause a slower VDD rise time that influences the Reset function.
Question 13
How do I wake up the HT4xR0xM from the HALT condition using a timer interrupt?
Answer
When the system clock is set to be the Internal RC+RTC mode and when in the HALT state, the system oscillator will be disabled while the RTC still continues to run. For this reason as long as the timer clock is set as the RTC clock, the timer will continue to operate and the MCU will be woken up when an interrupt occurs when the timer overflows. When the system clock is setup in other modes, the timer clock will be the system clock and will not be able to generate an timer interrupt to wake up the device from a HALT condition.
Question 14
Is there any other method to create a Table at an absolute address in the program memory when programming the HT4xR0xM, if ORG is not suitable for use?
Answer
An ORG expression: expression is the offset of the current SECTION start address instead of an absolute address. It is allowed to create a Table at an absolute address using SECTION. For example, table .section at 300 ‘code’- means to create a Table start location at the absolute address 300.
Question 15
What is the function of the SST selection in the configuration options of the HT4xR0xM?
Answer
The SST option is only effective under the IRC/ERC system frequency, during the time when the system is enabled. During an MCU reset or wake-up, the system will add an SST delay to ensure the stability of the system oscillator frequency. If the SST is setup as 2 clocks, the wake up time is 2 clocks. If the SST is setup as 1024 clocks, the wake-up time is 1024 clock. When the system frequency is Crystal or RTC 32768Hz, the SST will always be 1024 clocks.
Points to Note
Question 1
When using the HIRC, if the I/O pin which is shared with OSC1 is to be used as an AC zero crossing detector, will there be any influence on the HIRC oscillation frequency? If yes, which MCUs will be affected and how can this problem be resolved?? Answer
If the HIRC is used and if the I/O pin which is shared with OSC1 is used as an AC zero crossing detector pin, the HIRC oscillation frequency will be influenced.
The affected MCUs are:
All MCUs whose I/O pin is pin-shared with OSC1 (including the enhanced OTP type MCU and Flash type MCU etc.)
How to resolve this issue:
1. Avoid using the I/O pin that is shared with OSC1 as AC zero crossing detector pin.
2. If the problem can still not be resolved, add external circuitry to ensure that the voltage applied on the OSC1 pin remains withing the range of VDD and VSS.
|
