HT82A623R/HT82A6208/HT82A6216 -- A/D Type Full Speed USB 8-Bit MCU with SPI
(HT82A6208/HT82A6216 EOL Information)

General Description

The HT82A623R, HT82A6208 and HT82A6216 are 8-bit high performance RISC-like microcontrollers designed for USB keyboard, mouse and joystick product applications. The devices are also suitable for use in home appliances, particularly for use in high-level household appliances such as microwave ovens, washing machines and air conditioner products.

The HT82A6208 and HT82A6216 devices also possess an internal 8M or 16M Flash Memory further enhancing and expanding their application possibilities.

The advantages of low power consumption, I/O flexibility, programmable frequency divider, timer functions, oscillator options, multi-channel A/D Converter, Pulse Width Modulation function, USB Interface, Watchdog timer, SPI interfaces, Power Down and wake-up functions, enhance the versatility of these devices to suit a wide range of application possibilities.

The HT82A6208 contains a 8,388,608 bit serial Flash memory, which is configured as 1,048,576x8 internally. The HT82A6216 contains a 16,777,216 bit serial Flash memory, which is configured as 2,097,152x8 internally. The HT82A6208/HT82A6216 feature a serial peripheral interface and software protocol allowing operation on a simple 3-wire bus. The three bus signals are a clock input (SCLK), a serial data input (SI), and a serial data output (SO). SPI access to the device is enabled by the CS# input.

The device provides a sequential read operation on the whole chip.

After a program/erase command is issued, auto program/erase algorithms are executed which program/erase and verify the specified page or byte/sector/block locations. A program command is executed on a page (256 bytes) basis, and an erase command is executed on a chip or sector (4K-bytes) or block (64K-bytes) basis.

To provide the user with ease of interface, a status register is included to indicate the status of the device. The status read command can be issued to detect completion status of a program or erase operation via the WIP bit.

When the HT82A6208/HT82A6216 is not operating and CS# is high, it can be put into the standby mode where it will draw less than 10uA/20uA DC current.

The HT82A6208/HT82A6216 contains proprietary memory cells, which reliably store memory contents even after 100,000 program and erase cycles.

Features

  • Operating voltage:
    -- VDD (MCU)
          fSYS= 6MHz: 2.2V~5.5V
          fSYS= 12MHz: 3.0V~5.5V
    -- UBUS (USB BUS Voltage): 4.5V~5.5V
    -- VCC (HT82A6208 & HT82A6216 for Flash):
          2.8V~3.6V
  • 4Kx15 bits Program Memory
  • 160x8 bits Data Memory RAM
  • HT82A6208: 8Mx1 bits Flash memory structure
  • HT82A6216: 16Mx1 bits or 8Mx2 bits Flash memory structure
  • 32 bidirectional I/O lines
  • USB 2.0 Full Speed Compatible
  • One external interrupt input shared with I/O line
  • Two 16-bit programmable Timer/Event Counters with overflow interrupt
  • Two SPI interfaces (master and slave mode) shared with PA0~PA3, PB0~PB3
  • Total of 6 Interrupts - EXT, Timer0, Timer1, SPIA, SPIB, USB
  • Flash Serial Peripheral Interface compatible - Mode0 and Mode3
  • 8288608x1bit Flash memory structure - HT82A6208
  • 16777216x1bit or 8388608x2bit Flash memory structure - HT82A6216
  • 256 Equal Sector with 4K byte each for Flash memory structure - HT82A6208
  • 512 Equal Sector with 4K byte each for Flash memory structure - HT82A6216
  • Flash Memory Input Data Format: 1-byte Command code
  • Flash Memory Block Lock protection
  • Single Power Supply Operation
  • Watchdog Timer function
  • 32768Hz Real time clock
  • Power down and wake-up functions to reduce power consumption
  • 16 channel 12-bit resolution A/D converter
  • 2-channel 8-bit PWM output shared with two I/O lines
  • Up to 0.33us instruction cycle with 12MHz system clock at VDD=5V
  • Max. 4 endpoints supported - endpoint 0 included
  • All endpoints support Interrupt, & bulk transfer
  • Endpoint 0 supports control, interrupt and bulk transfer
  • All endpoints except endpoint 0 can be configured as 8, 16, 32, 64 FIFO size
  • Endpoint 0 has 8 byte FIFO
  • Total FIFO size: 64+8 bytes (RAM0: 48 bytes; 
    RAM1:16 bytes, 8 bytes for endpoint0)
  • 2.2Vą 5% LVD
  • 6-level subroutine nesting
  • Bit manipulation instruction
  • Table read instructions
  • 63 powerful instructions
  • All instructions executed in one or two machine cycles
  • Low voltage reset function
  • Wide range of available package types

Technical Document

Other Information